DUTs
GVLs
Global_Version
{attribute 'TcGenerated'}
{attribute 'no-analysis'}
{attribute 'linkalways'}
// This function has been automatically generated from the project information.
VAR_GLOBAL CONSTANT
{attribute 'const_non_replaced'}
stLibVersion_LFE_VAC : ST_LibVersion := (iMajor := 3, iMinor := 0, iBuild := 0, iRevision := 0, nFlags := 1, sVersion := '3.0.0');
END_VAR
GVL_Devices
//{attribute 'qualified_only'}
VAR_GLOBAL
(*TRANSPORT VACUUM 1 HXR 0 LINE*) //HXR INSTALLATION SECTION 1
{attribute 'TcLinkTo' := '.i_xOpnLS := TIIB[EBD_E1_EL1004]^Channel 1^Input;
.i_xClsLS := TIIB[EBD_E1_EL1004]^Channel 2^Input;
.q_xOPN_DO := TIIB[EBD_E2_EL2004]^Channel 1^Output;
.q_xOPN_DO := TIIB[EBD_E2_EL2004]^Channel 2^Output
'}
{attribute 'pytmc' := '
pv: TV1L0:VGC:01
io: io
'}
TV1L0_VGC_01 : FB_VGC;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[MKS_E2_EL3064]^AI Standard Channel 1^Value
'}
{attribute 'pytmc' := '
pv: TV1L0:GPI:01
io: io
'}
TV1L0_GPI_01 : FB_MKS317;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[MKS_E1_EL3064]^AI Standard Channel 1^Value;
.q_xHV_DIS := TIIB[MKS_E3_EL2794]^Channel 1^Output
'}
{attribute 'pytmc' := '
pv: TV1L0:GCC:01
io: io
'}
TV1L0_GCC_01 : FB_MKS422;
(*RAPID TRANSIT DIAGNOSTIC STAND HXR 0 LINE*)
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E1_EL3064]^AI Standard Channel 1^Value;
.i_xSP_DI := TIIB[QPC_E2_EL1004]^Channel 1^Input;
.q_xHVEna_DO := TIIB[QPC_E3_EL2794]^Channel 1^Output
'}
{attribute 'pytmc' := '
pv: RTDSL0:PIP:01
io: io
'}
RTDSL0_PIP_01 : FB_PIP_Gamma;
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E1_EL3064]^AI Standard Channel 2^Value;
.i_xSP_DI := TIIB[QPC_E2_EL1004]^Channel 2^Input;
.q_xHVEna_DO := TIIB[QPC_E3_EL2794]^Channel 2^Output
'}
{attribute 'pytmc' := '
pv: RTDSL0:PIP:02
io: io
'}
RTDSL0_PIP_02 : FB_PIP_Gamma;
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E1_EL3064]^AI Standard Channel 3^Value;
.i_xSP_DI := TIIB[QPC_E2_EL1004]^Channel 3^Input;
.q_xHVEna_DO := TIIB[QPC_E3_EL2794]^Channel 3^Output
'}
{attribute 'pytmc' := '
pv: RTDSL0:PIP:03
io: io
'}
RTDSL0_PIP_03 : FB_PIP_Gamma;
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E1_EL3064]^AI Standard Channel 4^Value;
.i_xSP_DI := TIIB[QPC_E2_EL1004]^Channel 4^Input;
.q_xHVEna_DO := TIIB[QPC_E3_EL2794]^Channel 4^Output
'}
{attribute 'pytmc' := '
pv: RTDSL0:PIP:04
io: io
'}
RTDSL0_PIP_04 : FB_PIP_Gamma;
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E4_EL3064]^AI Standard Channel 1^Value;
.i_xSP_DI := TIIB[QPC_E5_EL1004]^Channel 1^Input;
.q_xHVEna_DO := TIIB[QPC_E6_EL2794]^Channel 1^Output
'}
{attribute 'pytmc' := '
pv: RTDSL0:PIP:05
io: io
'}
RTDSL0_PIP_05 : FB_PIP_Gamma;
(* IM1L0-XTES*) //HXR INSTALLATION SECTION 2
{attribute 'TcLinkTo' := '.i_xOpnLS := TIIB[EBD_E1_EL1004]^Channel 3^Input;
.i_xClsLS := TIIB[EBD_E1_EL1004]^Channel 4^Input;
.q_xOPN_DO := TIIB[EBD_E2_EL2004]^Channel 3^Output;
.q_xOPN_DO := TIIB[EBD_E2_EL2004]^Channel 4^Output
'}
{attribute 'pytmc' := '
pv: IM1L0:XTES:VGC:01
io: io
'}
IM1L0_XTES_VGC_01 : FB_VGC;
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E4_EL3064]^AI Standard Channel 2^Value;
.i_xSP_DI := TIIB[QPC_E5_EL1004]^Channel 2^Input;
.q_xHVEna_DO := TIIB[QPC_E6_EL2794]^Channel 2^Output
'}
{attribute 'pytmc' := '
pv: IM1L0:XTES:PIP:01
io: io
'}
IM1L0_XTES_PIP_01 : FB_PIP_Gamma;
(*TV2L0*)
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E7_EL3064]^AI Standard Channel 1^Value;
.i_xSP_DI := TIIB[QPC_E8_EL1004]^Channel 1^Input;
.q_xHVEna_DO := TIIB[QPC_E9_EL2794]^Channel 1^Output
'}
{attribute 'pytmc' := '
pv: TV2L0:PIP:01
io: io
'}
TV2L0_PIP_01 : FB_PIP_Gamma;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[MKS_E2_EL3064]^AI Standard Channel 2^Value
'}
{attribute 'pytmc' := '
pv: TV2L0:GPI:01
io: io
'}
TV2L0_GPI_01 : FB_MKS317;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[MKS_E1_EL3064]^AI Standard Channel 3^Value;
.q_xHV_DIS := TIIB[MKS_E3_EL2794]^Channel 3^Output
'}
{attribute 'pytmc' := '
pv: TV2L0:GCC:01
io: io
'}
TV2L0_GCC_01 : FB_MKS422;
//HXR INSTALLATION SECTION 3
{attribute 'TcLinkTo' := '.i_xOpnLS := TIIB[EBD_E3_EL1004]^Channel 1^Input;
.i_xClsLS := TIIB[EBD_E3_EL1004]^Channel 2^Input;
.q_xOPN_DO := TIIB[EBD_E4_EL2004]^Channel 1^Output;
.q_xOPN_DO := TIIB[EBD_E4_EL2004]^Channel 2^Output
'}
{attribute 'pytmc' := '
pv: TV2L0:VGC:01
io: io
'}
TV2L0_VGC_01 : FB_VGC;
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E7_EL3064]^AI Standard Channel 2^Value;
.i_xSP_DI := TIIB[QPC_E8_EL1004]^Channel 2^Input;
.q_xHVEna_DO := TIIB[QPC_E9_EL2794]^Channel 2^Output
'}
{attribute 'pytmc' := '
pv: TV2L0:PIP:02
io: io
'}
TV2L0_PIP_02 : FB_PIP_Gamma;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[MKS_E18_EL3064]^AI Standard Channel 1^Value;
.q_xHV_DIS := TIIB[MKS_E20_EL2794]^Channel 1^Output
'}
{attribute 'pytmc' := '
pv: TV2L0:GFS:01
io: io
'}
TV2L0_GFS_01 : FB_MKS422;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[MKS_E5_EL3064]^AI Standard Channel 1^Value
'}
{attribute 'pytmc' := '
pv: TV2L0:GPI:02
io: io
'}
TV2L0_GPI_02 : FB_MKS317;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[MKS_E4_EL3064]^AI Standard Channel 1^Value;
.q_xHV_DIS := TIIB[MKS_E6_EL2794]^Channel 1^Output
'}
{attribute 'pytmc' := '
pv: TV2L0:GCC:02
io: io
'}
TV2L0_GCC_02 : FB_MKS422;
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E7_EL3064]^AI Standard Channel 3^Value;
.i_xSP_DI := TIIB[QPC_E8_EL1004]^Channel 3^Input;
.q_xHVEna_DO := TIIB[QPC_E9_EL2794]^Channel 3^Output
'}
{attribute 'pytmc' := '
pv: TV2L0:PIP:03
io: io
'}
TV2L0_PIP_03 : FB_PIP_Gamma;
{attribute 'TcLinkTo' := '.i_xOpnLS := TIIB[FEE_L0S2_EP1_EP2338-0002]^Channel 1^Input;
.i_xClsLS := TIIB[FEE_L0S2_EP1_EP2338-0002]^Channel 2^Input;
.q_xOPN_DO := TIIB[FEE_L0S2_EP1_EP2338-0002]^Channel 11^Output
'}
{attribute 'pytmc' := '
pv: TV2L0:VGC:02
io: io
'}
TV2L0_VGC_02 : FB_VGC;
(*SL1L0-POWER*) //HXR INSTALLATION SECTION 4
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[MKS_E9_EL3064]^AI Standard Channel 1^Value
'}
{attribute 'pytmc' := '
pv: SL1L0:POWER:GPI:01
io: io
'}
SL1L0_POWER_GPI_01 : FB_MKS317;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[MKS_E8_EL3064]^AI Standard Channel 1^Value;
.q_xHV_DIS := TIIB[MKS_E10_EL2794]^Channel 1^Output
'}
{attribute 'pytmc' := '
pv: SL1L0:POWER:GCC:01
io: io
'}
SL1L0_POWER_GCC_01 : FB_MKS422;
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E21_EL3064]^AI Standard Channel 1^Value;
.i_xSP_DI := TIIB[QPC_E22_EL1004]^Channel 1^Input;
.q_xHVEna_DO := TIIB[QPC_E23_EL2794]^Channel 1^Output
'}
{attribute 'pytmc' := '
pv: SL1L0:POWER:PIN:01
io: io
'}
SL1L0_POWER_PIN_01 : FB_PIP_Gamma;
(*AT2L0-SOLID*) //HXR INSTALLATION SECTION 6
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[MKS_E9_EL3064]^AI Standard Channel 2^Value
'}
{attribute 'pytmc' := '
pv: AT2L0:SOLID:GPI:01
io: io
'}
AT2L0_SOLID_GPI_01 : FB_MKS317;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[MKS_E8_EL3064]^AI Standard Channel 3^Value;
.q_xHV_DIS := TIIB[MKS_E10_EL2794]^Channel 3^Output
'}
{attribute 'pytmc' := '
pv: AT2L0:SOLID:GCC:01
io: io
'}
AT2L0_SOLID_GCC_01 : FB_MKS422;
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E21_EL3064]^AI Standard Channel 2^Value;
.i_xSP_DI := TIIB[QPC_E22_EL1004]^Channel 2^Input;
.q_xHVEna_DO := TIIB[QPC_E23_EL2794]^Channel 2^Output
'}
{attribute 'pytmc' := '
pv: AT2L0:SOLID:PIN:01
io: io
'}
AT2L0_SOLID_PIN_01 : FB_PIP_Gamma;
(*PC1L0-XTES*) //HXR INSTALLATION SECTION 7
{attribute 'TcLinkTo' := '.i_xOpnLS := TIIB[FEE_L0S8_EP1_EP2338-0002]^Channel 1^Input;
.i_xClsLS := TIIB[FEE_L0S8_EP1_EP2338-0002]^Channel 2^Input;
.q_xOPN_DO := TIIB[FEE_L0S8_EP1_EP2338-0002]^Channel 11^Output
'}
{attribute 'pytmc' := '
pv: PC1L0:XTES:VGC:01
io: io
'}
PC1L0_XTES_VGC_01 : FB_VGC;
(*SP1L0-DCCM*)
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[MKS_E12_EL3064]^AI Standard Channel 1^Value
'}
{attribute 'pytmc' := '
pv: SP1L0:DCCM:GPI:01
io: io
'}
SP1L0_DCCM_GPI_01 : FB_MKS317;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[MKS_E11_EL3064]^AI Standard Channel 1^Value;
.q_xHV_DIS := TIIB[MKS_E13_EL2794]^Channel 1^Output
'}
{attribute 'pytmc' := '
pv: SP1L0:DCCM:GCC:01
io: io
'}
SP1L0_DCCM_GCC_01 : FB_MKS422;
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[EXT_E10_EL3174]^AI Standard Channel 1^Value;
.i_xIP_ON := TIIB[EXT_E9_EL1124]^Channel 2^Input;
.i_xError := TIIB[EXT_E9_EL1124]^Channel 1^Input;
.q_xHVEna_DO := TIIB[EXT_E7_EL2794]^Channel 1^Output
'}
{attribute 'pytmc' := '
pv: SP1L0:DCCM:PIP:01
io: io
'}
SP1L0_DCCM_PIP_01 : FB_PIP_SIP;
(*not installed*)
(*{attribute 'TcLinkTo' := '.i_xOpnLS := TIIB[FEE_L0S10_EP1_EP2338-0002]^Channel 1^Input;
.i_xClsLS := TIIB[FEE_L0S10_EP1_EP2338-0002]^Channel 2^Input;
.q_xOPN_DO := TIIB[FEE_L0S10_EP1_EP2338-0002]^Channel 11^Output
'}
{attribute 'pytmc' := '
pv: SP1L0:DCCM:VGC:01
io: io
'}
SP1L0_DCCM_VGC_01 : FB_VGC;*)
(*PA1L0*)
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E21_EL3064]^AI Standard Channel 3^Value;
.i_xSP_DI := TIIB[QPC_E22_EL1004]^Channel 3^Input;
.q_xHVEna_DO := TIIB[QPC_E23_EL2794]^Channel 3^Output
'}
{attribute 'pytmc' := '
pv: PA1L0:PIN:01
io: io
'}
PA1L0_PIN_01 : FB_PIP_Gamma; //PIN???
(*
{attribute 'TcLinkTo' := '.???
'}
{attribute 'pytmc' := '
pv: PA1L0:VFS:01
io: io
'}
PA1L0_VFS_01 : FB_VFS_Interface;
*)
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[MKS_E15_EL3064]^AI Standard Channel 1^Value
'}
{attribute 'pytmc' := '
pv: PA1L0:GPI:01
io: io
'}
PA1L0_GPI_01 : FB_MKS317;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[MKS_E14_EL3064]^AI Standard Channel 1^Value;
.q_xHV_DIS := TIIB[MKS_E16_EL2794]^Channel 1^Output
'}
{attribute 'pytmc' := '
pv: PA1L0:GCC:01
io: io
'}
PA1L0_GCC_01 : FB_MKS422;
(*MR1L0-HOMS*) //HXR INSTALLATION SECTION 8
{attribute 'TcLinkTo' := '.i_xOpnLS := TIIB[FEE_L0S10_EP1_EP2338-0002]^Channel 1^Input;
.i_xClsLS := TIIB[FEE_L0S10_EP1_EP2338-0002]^Channel 2^Input;
.q_xOPN_DO := TIIB[FEE_L0S10_EP1_EP2338-0002]^Channel 11^Output
'}
{attribute 'pytmc' := '
pv: MR1L0:HOMS:VGC:01
io: io
'}
MR1L0_HOMS_VGC_01 : FB_VGC;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[MKS_E15_EL3064]^AI Standard Channel 2^Value
'}
{attribute 'pytmc' := '
pv: MR1L0:HOMS:GPI:01
io: io
'}
MR1L0_HOMS_GPI_01 : FB_MKS317;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[MKS_E14_EL3064]^AI Standard Channel 3^Value;
.q_xHV_DIS := TIIB[MKS_E16_EL2794]^Channel 3^Output
'}
{attribute 'pytmc' := '
pv: MR1L0:HOMS:GCC:01
io: io
'}
MR1L0_HOMS_GCC_01 : FB_MKS422;
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E11_EL3064]^AI Standard Channel 2^Value;
.i_xSP_DI := TIIB[QPC_E12_EL1004]^Channel 2^Input;
.q_xHVEna_DO := TIIB[QPC_E13_EL2794]^Channel 2^Output
'}
{attribute 'pytmc' := '
pv: MR1L0:HOMS:PIP:01
io: io
'}
MR1L0_HOMS_PIP_01 : FB_PIP_Gamma;
(*MR1L1-TXI*)
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[FEE_L0S14_EP2_EP3174-0002]^AI Standard Channel 1^Value
'}
{attribute 'pytmc' := '
pv: MR1L1:TXI:GPI:01
io: io
'}
MR1L1_TXI_GPI_01 : FB_MKS275;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[FEE_L0S14_EP2_EP3174-0002]^AI Standard Channel 2^Value;
.q_xHV_DIS := TIIB[FEE_L0S14_EP3_EP2624-0002]^Channel 2^Output
'}
{attribute 'pytmc' := '
pv: MR1L1:TXI:GCC:01
io: io
'}
MR1L1_TXI_GCC_01 : FB_MKS500;
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E14_EL3064]^AI Standard Channel 4^Value;
.i_xSP_DI := TIIB[QPC_E15_EL1004]^Channel 4^Input;
.q_xHVEna_DO := TIIB[QPC_E16_EL2794]^Channel 4^Output
'}
{attribute 'pytmc' := '
pv: MR1L1:TXI:PIP:01
io: io
'}
MR1L1_TXI_PIP_01 : FB_PIP_Gamma;
(*BT2L0-PLEG*) //HXR INSTALLATION SECTION 9
{attribute 'TcLinkTo' := '.i_xOpnLS := TIIB[FEE_L0S14_EP1_EP2338-0002]^Channel 1^Input;
.i_xClsLS := TIIB[FEE_L0S14_EP1_EP2338-0002]^Channel 2^Input;
.q_xOPN_DO := TIIB[FEE_L0S14_EP1_EP2338-0002]^Channel 11^Output
'}
{attribute 'pytmc' := '
pv: BT2L0:PLEG:VGC:01
io: io
'}
BT2L0_PLEG_VGC_01 : FB_VGC;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[FEE_L0S14_EP2_EP3174-0002]^AI Standard Channel 3^Value
'}
{attribute 'pytmc' := '
pv: BT2L0:PLEG:GPI:01
io: io
'}
BT2L0_PLEG_GPI_01 : FB_MKS275;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[FEE_L0S14_EP2_EP3174-0002]^AI Standard Channel 4^Value;
.q_xHV_DIS := TIIB[FEE_L0S14_EP3_EP2624-0002]^Channel 4^Output
'}
{attribute 'pytmc' := '
pv: BT2L0:PLEG:GCC:01
io: io
'}
BT2L0_PLEG_GCC_01 : FB_MKS500;
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E11_EL3064]^AI Standard Channel 3^Value;
.i_xSP_DI := TIIB[QPC_E12_EL1004]^Channel 3^Input;
.q_xHVEna_DO := TIIB[QPC_E13_EL2794]^Channel 3^Output
'}
{attribute 'pytmc' := '
pv: BT2L0:PLEG:PIP:01
io: io
'}
BT2L0_PLEG_PIP_01 : FB_PIP_Gamma;
(*MR2L0-HOMS*) //HXR INSTALLATION SECTION 10
{attribute 'TcLinkTo' := '.i_xOpnLS := TIIB[FEE_L0S18_EP1_EP2338-0002]^Channel 1^Input;
.i_xClsLS := TIIB[FEE_L0S18_EP1_EP2338-0002]^Channel 2^Input;
.q_xOPN_DO := TIIB[FEE_L0S18_EP1_EP2338-0002]^Channel 11^Output
'}
{attribute 'pytmc' := '
pv: MR2L0:HOMS:VGC:01
io: io
'}
MR2L0_HOMS_VGC_01 : FB_VGC;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[FEE_L0S18_EP2_EP3174-0002]^AI Standard Channel 1^Value
'}
{attribute 'pytmc' := '
pv: MR2L0:HOMS:GPI:01
io: io
'}
MR2L0_HOMS_GPI_01 : FB_MKS275;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[FEE_L0S18_EP2_EP3174-0002]^AI Standard Channel 2^Value;
.q_xHV_DIS := TIIB[FEE_L0S18_EP3_EP2624-0002]^Channel 2^Output
'}
{attribute 'pytmc' := '
pv: MR2L0:HOMS:GCC:01
io: io
'}
MR2L0_HOMS_GCC_01 : FB_MKS500;
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E11_EL3064]^AI Standard Channel 4^Value;
.i_xSP_DI := TIIB[QPC_E12_EL1004]^Channel 4^Input;
.q_xHVEna_DO := TIIB[QPC_E13_EL2794]^Channel 4^Output
'}
{attribute 'pytmc' := '
pv: MR2L0:HOMS:PIP:01
io: io
'}
MR2L0_HOMS_PIP_01 : FB_PIP_Gamma;
{attribute 'TcLinkTo' := '.i_xOpnLS := TIIB[FEE_L0S19_EP1_EP2338-0002]^Channel 1^Input;
.i_xClsLS := TIIB[FEE_L0S19_EP1_EP2338-0002]^Channel 2^Input;
.q_xOPN_DO := TIIB[FEE_L0S19_EP1_EP2338-0002]^Channel 11^Output
'}
{attribute 'pytmc' := '
pv: MR2L0:HOMS:VGC:02
io: io
'}
MR2L0_HOMS_VGC_02 : FB_VGC;
{attribute 'TcLinkTo' := '.q_xPress_OK := TIPC^plc_lfe_vac^plc_lfe_vac Instance^FSV_Task Inputs^GVL_FS_Devices.TV3L0_VFS_01.i_xPress_OK;
.q_xOPN_SW := TIPC^plc_lfe_vac^plc_lfe_vac Instance^FSV_Task Inputs^GVL_FS_Devices.TV3L0_VFS_01.i_xOPN_SW;
.q_xCLS_SW := TIPC^plc_lfe_vac^plc_lfe_vac Instance^FSV_Task Inputs^GVL_FS_Devices.TV3L0_VFS_01.i_xCLS_SW;
.q_xVAC_FAULT_Reset:= TIPC^plc_lfe_vac^plc_lfe_vac Instance^FSV_Task Inputs^GVL_FS_Devices.TV3L0_VFS_01.i_xVAC_FAULT_Reset;
.q_xOverrideMode := TIPC^plc_lfe_vac^plc_lfe_vac Instance^FSV_Task Inputs^GVL_FS_Devices.TV3L0_VFS_01.i_xOverrideMode;
.q_xOverrideOpen := TIPC^plc_lfe_vac^plc_lfe_vac Instance^FSV_Task Inputs^GVL_FS_Devices.TV3L0_VFS_01.i_xOverrideOpen;
.i_xTrigger := TIPC^plc_lfe_vac^plc_lfe_vac Instance^FSV_Task Outputs^GVL_FS_Devices.TV3L0_VFS_01.q_xTrigger;
.i_xVFS_Open := TIPC^plc_lfe_vac^plc_lfe_vac Instance^FSV_Task Outputs^GVL_FS_Devices.TV3L0_VFS_01.q_xVFS_Open;
.i_xVFS_Closed := TIPC^plc_lfe_vac^plc_lfe_vac Instance^FSV_Task Outputs^GVL_FS_Devices.TV3L0_VFS_01.q_xVFS_Closed;
.i_xVAC_FAULT_OK := TIPC^plc_lfe_vac^plc_lfe_vac Instance^FSV_Task Outputs^GVL_FS_Devices.TV3L0_VFS_01.q_xVAC_FAULT_OK;
.i_xMPS_OK := TIPC^plc_lfe_vac^plc_lfe_vac Instance^FSV_Task Outputs^GVL_FS_Devices.TV3L0_VFS_01.q_xMPS_OK;
.i_eVFS_State := TIPC^plc_lfe_vac^plc_lfe_vac Instance^FSV_Task Outputs^GVL_FS_Devices.TV3L0_VFS_01.q_eVFS_State
'}
{attribute 'pytmc' := '
pv: TV3L0:VFS:01
io: io
'}
TV3L0_VFS_01_Interface : FB_VFS_Interface;
(*TV1L1*) //TXI Line Valve
{attribute 'TcLinkTo' := '.i_xOpnLS := TIIB[FEE_L0S18_EP1_EP2338-0002]^Channel 5^Input;
.i_xClsLS := TIIB[FEE_L0S18_EP1_EP2338-0002]^Channel 6^Input;
.q_xOPN_DO := TIIB[FEE_L0S18_EP1_EP2338-0002]^Channel 15^Output
'}
{attribute 'pytmc' := '
pv: TV1L1:VGC:01
io: io
'}
TV1L1_VGC_01 : FB_VGC;
(*TV3L0*) //HXR INSTALLATION SECTION 11
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E14_EL3064]^AI Standard Channel 1^Value;
.i_xSP_DI := TIIB[QPC_E15_EL1004]^Channel 1^Input;
.q_xHVEna_DO := TIIB[QPC_E16_EL2794]^Channel 1^Output
'}
{attribute 'pytmc' := '
pv: TV3L0:PIP:01
io: io
'}
TV3L0_PIP_01 : FB_PIP_Gamma;
(*ST1L0-XTES*)
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[FEE_L0S21-2_EP1_EP3174-0002]^AI Standard Channel 1^Value
'}
{attribute 'pytmc' := '
pv: ST1L0:XTES:GPI:01
io: io
'}
ST1L0_XTES_GPI_01 : FB_MKS275;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[FEE_L0S21-2_EP1_EP3174-0002]^AI Standard Channel 2^Value;
.q_xHV_DIS := TIIB[FEE_L0S21-2_EP2_EP2624-0002]^Channel 2^Output
'}
{attribute 'pytmc' := '
pv: ST1L0:XTES:GCC:01
io: io
'}
ST1L0_XTES_GCC_01 : FB_MKS500;
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E14_EL3064]^AI Standard Channel 2^Value;
.i_xSP_DI := TIIB[QPC_E15_EL1004]^Channel 2^Input;
.q_xHVEna_DO := TIIB[QPC_E16_EL2794]^Channel 2^Output
'}
{attribute 'pytmc' := '
pv: ST1L0:XTES:PIP:01
io: io
'}
ST1L0_XTES_PIP_01 : FB_PIP_Gamma;
(*PC2L1-L2SI*)//TXI Line Valve
{attribute 'TcLinkTo' := '.i_xOpnLS := TIIB[FEE_L0S19_EP1_EP2338-0002]^Channel 5^Input;
.i_xClsLS := TIIB[FEE_L0S19_EP1_EP2338-0002]^Channel 6^Input;
.q_xOPN_DO := TIIB[FEE_L0S19_EP1_EP2338-0002]^Channel 15^Output
'}
{attribute 'pytmc' := '
pv: PC2L1:L2SI:VGC:01
io: io
'}
PC2L1_L2SI_VGC_01 : FB_VGC;
(*TV4L0*) // Hutch 1.1
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[H11_L0S2_EP2_EP3174-0002]^AI Standard Channel 1^Value
'}
{attribute 'pytmc' := '
pv: TV4L0:GPI:01
io: io
'}
TV4L0_GPI_01 : FB_MKS275;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[H11_L0S2_EP2_EP3174-0002]^AI Standard Channel 2^Value;
.q_xHV_DIS := TIIB[H11_L0S2_EP3_EP2624-0002]^Channel 2^Output
'}
{attribute 'pytmc' := '
pv: TV4L0:GCC:01
io: io
'}
TV4L0_GCC_01 : FB_MKS500;
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E17_EL3064]^AI Standard Channel 1^Value;
.i_xSP_DI := TIIB[QPC_E18_EL1004]^Channel 1^Input;
.q_xHVEna_DO := TIIB[QPC_E19_EL2794]^Channel 1^Output
'}
{attribute 'pytmc' := '
pv: TV4L0:PIP:01
io: io
'}
TV4L0_PIP_01 : FB_PIP_Gamma;
{attribute 'TcLinkTo' := '.i_xOpnLS := TIIB[H11_L0S2_EP1_EP2338-0002]^Channel 1^Input;
.i_xClsLS := TIIB[H11_L0S2_EP1_EP2338-0002]^Channel 2^Input;
.q_xOPN_DO := TIIB[H11_L0S2_EP1_EP2338-0002]^Channel 11^Output
'}
{attribute 'pytmc' := '
pv: TV4L0:VGC:01
io: io
'}
TV4L0_VGC_01 : FB_VGC;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[H11_L0S9_EP1_EP3174-0002]^AI Standard Channel 1^Value
'}
{attribute 'pytmc' := '
pv: TV4L0:GPI:02
io: io
'}
TV4L0_GPI_02 : FB_MKS275;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[H11_L0S9_EP1_EP3174-0002]^AI Standard Channel 2^Value;
.q_xHV_DIS := TIIB[H11_L0S9_EP2_EP2624-0002]^Channel 2^Output
'}
{attribute 'pytmc' := '
pv: TV4L0:GCC:02
io: io
'}
TV4L0_GCC_02 : FB_MKS500;
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E17_EL3064]^AI Standard Channel 2^Value;
.i_xSP_DI := TIIB[QPC_E18_EL1004]^Channel 2^Input;
.q_xHVEna_DO := TIIB[QPC_E19_EL2794]^Channel 2^Output
'}
{attribute 'pytmc' := '
pv: TV4L0:PIP:02
io: io
'}
TV4L0_PIP_02 : FB_PIP_Gamma;
(*PA2L0*)
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E21_EL3064]^AI Standard Channel 4^Value;
.i_xSP_DI := TIIB[QPC_E22_EL1004]^Channel 4^Input;
.q_xHVEna_DO := TIIB[QPC_E23_EL2794]^Channel 4^Output
'}
{attribute 'pytmc' := '
pv: PA2L0:PIN:01
io: io
'}
PA2L0_PIN_01 : FB_PIP_Gamma;
//Hutch 1.2
(*TV5L0*)
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[H12_L0S1_EP1_EP3174-0002]^AI Standard Channel 1^Value
'}
{attribute 'pytmc' := '
pv: TV5L0:GPI:01
io: io
'}
TV5L0_GPI_01 : FB_MKS275;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[H12_L0S1_EP1_EP3174-0002]^AI Standard Channel 2^Value;
.q_xHV_DIS := TIIB[H12_L0S1_EP2_EP2624-0002]^Channel 2^Output
'}
{attribute 'pytmc' := '
pv: TV5L0:GCC:01
io: io
'}
TV5L0_GCC_01 : FB_MKS500;
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E17_EL3064]^AI Standard Channel 3^Value;
.i_xSP_DI := TIIB[QPC_E18_EL1004]^Channel 3^Input;
.q_xHVEna_DO := TIIB[QPC_E19_EL2794]^Channel 3^Output
'}
{attribute 'pytmc' := '
pv: TV5L0:PIP:01
io: io
'}
TV5L0_PIP_01 : FB_PIP_Gamma;
{attribute 'TcLinkTo' := '.i_xOpnLS := TIIB[H12_L0S3_EP1_EP2338-0002]^Channel 1^Input;
.i_xClsLS := TIIB[H12_L0S3_EP1_EP2338-0002]^Channel 2^Input;
.q_xOPN_DO := TIIB[H12_L0S3_EP1_EP2338-0002]^Channel 11^Output
'}
{attribute 'pytmc' := '
pv: TV5L0:VGC:01
io: io
'}
TV5L0_VGC_01 : FB_VGC;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[H12_L0S3_EP2_EP3174-0002]^AI Standard Channel 1^Value
'}
{attribute 'pytmc' := '
pv: TV5L0:GPI:02
io: io
'}
TV5L0_GPI_02 : FB_MKS275;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[H12_L0S3_EP2_EP3174-0002]^AI Standard Channel 2^Value;
.q_xHV_DIS := TIIB[H12_L0S3_EP3_EP2624-0002]^Channel 2^Output
'}
{attribute 'pytmc' := '
pv: TV5L0:GCC:02
io: io
'}
TV5L0_GCC_02 : FB_MKS500;
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E17_EL3064]^AI Standard Channel 4^Value;
.i_xSP_DI := TIIB[QPC_E18_EL1004]^Channel 4^Input;
.q_xHVEna_DO := TIIB[QPC_E19_EL2794]^Channel 4^Output
'}
{attribute 'pytmc' := '
pv: TV5L0:PIP:02
io: io
'}
TV5L0_PIP_02 : FB_PIP_Gamma;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[MKS_E18_EL3064]^AI Standard Channel 3^Value;
.q_xHV_DIS := TIIB[MKS_E20_EL2794]^Channel 2^Output
'}
{attribute 'pytmc' := '
pv: TV5L0:GFS:01
io: io
'}
TV5L0_GFS_01 : FB_MKS422;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[H12_L0S3_EP2_EP3174-0002]^AI Standard Channel 4^Value;
.q_xHV_DIS := TIIB[H12_L0S3_EP3_EP2624-0002]^Channel 4^Output
'}
{attribute 'pytmc' := '
pv: TV5L0:GCC:03
io: io
'}
TV5L0_GCC_03 : FB_MKS500;
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[QPC_E4_EL3064]^AI Standard Channel 3^Value;
.i_xSP_DI := TIIB[QPC_E5_EL1004]^Channel 3^Input;
.q_xHVEna_DO := TIIB[QPC_E6_EL2794]^Channel 3^Output
'}
{attribute 'pytmc' := '
pv: TV5L0:PIP:03
io: io
'}
TV5L0_PIP_03 : FB_PIP_Gamma;
(*TV6L0*)
{attribute 'TcLinkTo' := '.i_xOpnLS := TIIB[H12_L0S6_EP1_EP2338-0002]^Channel 1^Input;
.i_xClsLS := TIIB[H12_L0S6_EP1_EP2338-0002]^Channel 2^Input;
.q_xOPN_DO := TIIB[H12_L0S6_EP1_EP2338-0002]^Channel 11^Output
'}
{attribute 'pytmc' := '
pv: TV6L0:VGC:01
io: io
'}
TV6L0_VGC_01 : FB_VGC;
//LCLS-II-HE Intermin install
//Hutch 1.3
// To be removed when HE installation is complete
(*SP1L2-LODCM*)
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[XPP_EL3064_00_05]^AI Standard Channel 1^Value
'}
{attribute 'pytmc' := '
pv: SP1L2:LODCM:GPI:01
io: io
'}
SP1L2_LODCM_GPI_01 : FB_MKS317;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[XPP_EL3064_00_04]^AI Standard Channel 1^Value;
.q_xHV_DIS := TIIB[XPP_EL2794_00_06]^Channel 1^Output
'}
{attribute 'pytmc' := '
pv: SP1L2:LODCM:GCC:01
io: io
'}
SP1L2_LODCM_GCC_01 : FB_MKS422;
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[XPP_EL3064_00_02]^AI Standard Channel 1^Value;
.i_xSP_DI := TIIB[XPP_EL1004_00_03]^Channel 1^Input;
.q_xHVEna_DO := TIIB[XPP_EL2794_00_01]^Channel 1^Output
'}
{attribute 'pytmc' := '
pv: TV7L0:PIP:01
io: io
'}
TV7L0_PIP_01 : FB_PIP_Gamma;
{attribute 'TcLinkTo' := '.i_iPRESS := TIIB[XPP_EL3064_00_02]^AI Standard Channel 2^Value;
.i_xSP_DI := TIIB[XPP_EL1004_00_03]^Channel 2^Input;
.q_xHVEna_DO := TIIB[XPP_EL2794_00_01]^Channel 2^Output
'}
{attribute 'pytmc' := '
pv: TV8L0:PIP:01
io: io
'}
TV8L0_PIP_01 : FB_PIP_Gamma;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[XPP_EL3064_00_05]^AI Standard Channel 2^Value'}
{attribute 'pytmc' := '
pv: TV8L0:GPI:01
io: io
'}
TV8L0_GPI_01 : FB_MKS317;
{attribute 'TcLinkTo' := '.i_iPRESS_R := TIIB[XPP_EL3064_00_04]^AI Standard Channel 3^Value;
.q_xHV_DIS := TIIB[XPP_EL2794_00_06]^Channel 2^Output
'}
{attribute 'pytmc' := '
pv: TV8L0:GCC:01
io: io
'}
TV8L0_GCC_01 : FB_MKS422;
{attribute 'TcLinkTo' := '.i_xOpnLS := TIIB[XPP_EL1004_00_07]^Channel 2^Input;
.i_xClsLS := TIIB[XPP_EL1004_00_07]^Channel 1^Input;
.q_xOPN_DO := TIIB[XPP_EL2004_00_08]^Channel 1^Output
'}
{attribute 'pytmc' := '
pv: TV8L0:VGC:01
io: io
'}
TV8L0_VGC_01 : FB_VGC;
END_VAR
- Related:
GVL_FS_Devices
//{attribute 'qualified_only'}
VAR_GLOBAL
(*
{attribute 'TcLinkTo' := '.i_xOPNLS := TIIB[FSV1_E1_EL1004]^Channel 2^Input;
.i_xClsLS := TIIB[FSV1_E1_EL1004]^Channel 1^Input;
.q_xClose_A := TIIB[FSV1_E3_EL2202]^Channel 1^Output;
.q_xClose_B := TIIB[FSV1_E3_EL2202]^Channel 2^Output;
.q_xClose_C := TIIB[FSV1_E4_EL2202]^Channel 1^Output;
.q_xOPN_DO := TIIB[FSV1_E4_EL2202]^Channel 2^Output;
.i_xTrigger := TIIB[MKS_E22_EL1124]^Channel 1^Input
'}
PA1L0_VFS_01 : FB_VFS;
*)
{attribute 'TcLinkTo' := '.i_xOPNLS := TIIB[FSV2_E1_EL1004]^Channel 2^Input;
.i_xClsLS := TIIB[FSV2_E1_EL1004]^Channel 1^Input;
.q_xClose_A := TIIB[FSV2_E3_EL2202]^Channel 1^Output;
.q_xClose_B := TIIB[FSV2_E3_EL2202]^Channel 2^Output;
.q_xClose_C := TIIB[FSV2_E4_EL2202]^Channel 1^Output;
.q_xOPN_DO := TIIB[FSV2_E4_EL2202]^Channel 2^Output;
.i_xTrigger := TIIB[MKS_E22_EL1124]^Channel 2^Input
'}
{attribute 'pytmc' := '
pv: TV3L0:VFS:01
io: io
'}
TV3L0_VFS_01 : FB_VFS;
END_VAR
GVL_LFE_VAC_FSV_PMPS
//{attribute 'qualified_only'}
VAR_GLOBAL
//Example implementation of the FFO
{attribute 'pytmc' := '
pv: PLC:LFE:VAC:FFO:03
'}
{attribute 'TcLinkTo' := '.q_xFastFaultOut:=TIIB[PLC_E2_EL2202]^Channel 1^Output'}
g_FastFaultOutput3 : FB_HardwareFFOutput :=(i_sNetID:='172.21.88.66.1.1'); //FFO for Fast Shutter Valves upstream of ST1L0_XTES
{attribute 'pytmc' := '
pv: PLC:LFE:VAC:RESET:FF3
'}
xReset_PMPS_FFO3 : BOOL := FALSE; //FFO RESET for Fast Shutter Valves upstream of ST1L0_XTES
xFEE_FSV_MPS_OK: BOOL := TRUE;
END_VAR
GVL_LFE_VAC_PMPS
//{attribute 'qualified_only'}
VAR_GLOBAL
//Example implementation of the FFO
{attribute 'pytmc' := '
pv: PLC:LFE:VAC:FFO:01
'}
{attribute 'TcLinkTo' := '.q_xFastFaultOut:=TIIB[PLC_E1_EL2202]^Channel 1^Output'}
g_FastFaultOutput1 : FB_HardwareFFOutput :=(i_sNetID:='172.21.88.66.1.1'); //FFO for ST1L0_XTES's Upstream Components
{attribute 'pytmc' := '
pv: PLC:LFE:VAC:FFO:02
'}
{attribute 'TcLinkTo' := '.q_xFastFaultOut:=TIIB[PLC_E1_EL2202]^Channel 2^Output'}
g_FastFaultOutput2 : FB_HardwareFFOutput :=(i_sNetID:='172.21.88.66.1.1'); //FFO for ST1L0_XTES's Downstream Components
{attribute 'pytmc' := '
pv: PLC:LFE:VAC:FFO:04
'}
g_FastFaultOutput4 : FB_HardwareFFOutput :=(i_sNetID:='172.21.88.66.1.1'); // FFO for valves that are downstream of the optics and upstream of ST1L1 on the L1 line.
{attribute 'pytmc' := '
pv: PLC:LFE:VAC:RESET:FF1
'}
xReset_PMPS_FFO1 : BOOL := FALSE; //FFO RESET for ST1L0_XTES's Upstream Components
{attribute 'pytmc' := '
pv: PLC:LFE:VAC:RESET:FF2
'}
xReset_PMPS_FFO2 : BOOL := FALSE; //FFO RESET for ST1L0_XTES's Downstream Components
xEBD_FEE_MPS_OK: BOOL := TRUE;
xH1_1_H1_2_MPS_OK: BOOL;
//Preemptive Arbiter Content
(*LFE Arbiter Interface*)
g_fbArbiter1 : FB_Arbiter(1);
END_VAR
GVL_PLC_Interfaces
//{attribute 'qualified_only'}
VAR_GLOBAL
(*HXR Accelerator side PLC Interface*)
Accelerator_Upstream_Gauge : ST_VG;
{attribute 'TcLinkTo' := 'TIIB[EBD_E5_EL1008]^Channel 1^Input
'}
i_xUpstreamTreaty_PressOK AT %I* : BOOL;
// {attribute 'TcLinkTo' := 'TIIB[EBD_E8_EL2794]^Channel 1^Output
// '}
// q_xUpstreamTreaty_PressOK AT %Q* : BOOL;
(*HXR Gas Attenuator PLC Interface*)
fb_ADS_WATCHDOG_VAC_LFE_GEM:FB_ADS_WATCHDOG;
(*TXI PLC Interface*)
{attribute 'TcLinkTo' := '.i_rPRESS := TIIB[TXI_HXR_VAC_PLC (EL6692)]^IO Inputs^PC2L1_PIP_01_rPress;
.i_xAT_VAC := TIIB[TXI_HXR_VAC_PLC (EL6692)]^IO Inputs^PC2L1_PIP_01_AT_VAC;
.i_xPRESS_OK := TIIB[TXI_HXR_VAC_PLC (EL6692)]^IO Inputs^PC2L1_PIP_01_PRESS_OK
'}
PC2L1_L2SI_PIP_01:FB_Gauge_Interface;
(*XRT PLC Interface*)
{attribute 'pytmc' := '
pv: PLC:LFE:VAC:XPP:DS:GCC_EPICS
'}
XRT_Downstream_Gauge : ST_VG;
XRT_Modbus_Gauge : FB_GaugeModbus; //ST_VG;
XRT_DS_Gauge : ST_VG;
{attribute 'pytmc' := '
pv: PLC:LFE:VAC:XRT:Downstream:PMON
link: HXX:UM6:GCC:01:PMON
'}
XRT_PressureLinkHelper : FB_LREALFromEPICS;
END_VAR
GVL_Variables
//{attribute 'qualified_only'}
VAR_GLOBAL
r_Accelerator_Setpoint : REAL := 1E-12; (*unrealistic setpoint currently*)
{attribute 'pytmc' := '
pv: PLC:LFE:VAC:EBD:OVRDON
io: io
'}
xSystemOverrideMode_EBD : BOOL := FALSE; (* Global system override for the HXR Vacuum System EBD*)
{attribute 'pytmc' := '
pv: PLC:LFE:VAC:FEE:OVRDON
io: io
'}
xSystemOverrideMode_FEE : BOOL := FALSE; (* Global system override for the HXR Vacuum System FEE*)
{attribute 'pytmc' := '
pv: PLC:LFE:VAC:H1_1H1_2:OVRDON
io: io
'}
xSystemOverrideMode_H1_1_H1_2 : BOOL := FALSE; (* Global system override for the HXR Vacuum System Hutch1.1 and Hutch1.2*)
END_VAR
POUs
CheckBounds
// Implicitly generated code : DO NOT EDIT
FUNCTION CheckBounds : DINT
VAR_INPUT
index, lower, upper: DINT;
END_VAR
// Implicitly generated code : Only an Implementation suggestion
{noflow}
IF index < lower THEN
CheckBounds := lower;
ELSIF index > upper THEN
CheckBounds := upper;
ELSE
CheckBounds := index;
END_IF
{flow}
END_FUNCTION
CheckDivDInt
// Implicitly generated code : DO NOT EDIT
FUNCTION CheckDivDInt : DINT
VAR_INPUT
divisor:DINT;
END_VAR
// Implicitly generated code : Only an Implementation suggestion
{noflow}
IF divisor = 0 THEN
CheckDivDInt:=1;
ELSE
CheckDivDInt:=divisor;
END_IF;
{flow}
END_FUNCTION
CheckDivLInt
// Implicitly generated code : DO NOT EDIT
FUNCTION CheckDivLInt : LINT
VAR_INPUT
divisor:LINT;
END_VAR
// Implicitly generated code : Only an Implementation suggestion
{noflow}
IF divisor = 0 THEN
CheckDivLInt:=1;
ELSE
CheckDivLInt:=divisor;
END_IF;
{flow}
END_FUNCTION
CheckDivLReal
// Implicitly generated code : DO NOT EDIT
FUNCTION CheckDivLReal : LREAL
VAR_INPUT
divisor:LREAL;
END_VAR
// Implicitly generated code : Only an Implementation suggestion
{noflow}
IF divisor = 0 THEN
CheckDivLReal:=1;
ELSE
CheckDivLReal:=divisor;
END_IF;
{flow}
END_FUNCTION
CheckDivReal
// Implicitly generated code : DO NOT EDIT
FUNCTION CheckDivReal : REAL
VAR_INPUT
divisor:REAL;
END_VAR
// Implicitly generated code : Only an Implementation suggestion
{noflow}
IF divisor = 0 THEN
CheckDivReal:=1;
ELSE
CheckDivReal:=divisor;
END_IF;
{flow}
END_FUNCTION
CheckLRangeSigned
// Implicitly generated code : DO NOT EDIT
FUNCTION CheckLRangeSigned : LINT
VAR_INPUT
value, lower, upper: LINT;
END_VAR
// Implicitly generated code : Only an Implementation suggestion
{noflow}
IF (value < lower) THEN
CheckLRangeSigned := lower;
ELSIF(value > upper) THEN
CheckLRangeSigned := upper;
ELSE
CheckLRangeSigned := value;
END_IF
{flow}
END_FUNCTION
CheckLRangeUnsigned
// Implicitly generated code : DO NOT EDIT
FUNCTION CheckLRangeUnsigned : ULINT
VAR_INPUT
value, lower, upper: ULINT;
END_VAR
// Implicitly generated code : Only an Implementation suggestion
{noflow}
IF (value < lower) THEN
CheckLRangeUnsigned := lower;
ELSIF(value > upper) THEN
CheckLRangeUnsigned := upper;
ELSE
CheckLRangeUnsigned := value;
END_IF
{flow}
END_FUNCTION
CheckPointer
// Implicitly generated code : DO NOT EDIT
FUNCTION CheckPointer : POINTER TO BYTE
VAR_INPUT
ptToTest : POINTER TO BYTE; // Destination address of the pointer
iSize : DINT; // Size of the type the pointer points to. (e.g: 20 for POINTER TO ARRAY [0..9] OF INT)
iGran : DINT; // Granularity of the pointer access. This is the size of the biggest non-structured data type in the type the pointer points to. (e.g: 2 for POINTER TO ARRAY [0..9] OF INT)
bWrite: BOOL; // Indicates read or write Access. TRUE = write access.
END_VAR
// No standard way of implementation. Fill your own code here
CheckPointer := ptToTest;
{flow}
END_FUNCTION
CheckRangeSigned
// Implicitly generated code : DO NOT EDIT
FUNCTION CheckRangeSigned : DINT
VAR_INPUT
value, lower, upper: DINT;
END_VAR
// Implicitly generated code : Only an Implementation suggestion
{noflow}
IF (value < lower) THEN
CheckRangeSigned := lower;
ELSIF(value > upper) THEN
CheckRangeSigned := upper;
ELSE
CheckRangeSigned := value;
END_IF
{flow}
END_FUNCTION
CheckRangeUnsigned
// Implicitly generated code : DO NOT EDIT
FUNCTION CheckRangeUnsigned : UDINT
VAR_INPUT
value, lower, upper: UDINT;
END_VAR
// Implicitly generated code : Only an Implementation suggestion
{noflow}
IF (value < lower) THEN
CheckRangeUnsigned := lower;
ELSIF(value > upper) THEN
CheckRangeUnsigned := upper;
ELSE
CheckRangeUnsigned := value;
END_IF
{flow}
END_FUNCTION
DIAGNOSTICS
PROGRAM DIAGNOSTICS
VAR
//Change the PLC String Name to the actual PLC NAME
sPLCName :STRING := 'PLC-LFE-VAC';
//Link the sAMSNetID to the Etherat Master netID
i_sAMSNetID AT %I*: AMSNETID;
// DO NOT CHANGE
sAMSNetID : STRING; //used for EPICS PV
sLibVersion_LCLS_General : STRING;(* := stLibVersion_LCLS_General.sVersion*) ;
fbEcatDiag:FB_EcatDiag;
bAllSlaveStateGood : BOOL;
bMasterStateGood :BOOL;
iMasterState: WORD;
sMasterState:STRING;
nSlaveNumber : UINT;
aiSlaveStates: ARRAY[1..256] OF BYTE;
aEcSlaveInfo : ARRAY[1..256] OF ST_EcDevice;
END_VAR
// Instaniating a call to the fbEcatDiag
fbEcatDiag(
I_AMSNetId:=i_sAMSNetID ,
i_xFirstPass:= _TaskInfo[1].FirstCycle,
q_xAllSlaveStatesGood=> bAllSlaveStateGood ,
q_anTermStates=> aiSlaveStates,
q_xMasterStateGood=>bMasterStateGood ,
q_nMasterState=> iMasterState,
q_sMasterState=> sMasterState ,
q_astEcConfSlaveInfo=> aEcSlaveInfo ,
q_nSlaves=> nSlaveNumber);
END_PROGRAM
MAIN
PROGRAM MAIN
VAR
fbLogHandler : FB_LogHandler;
ctuTest : CTU;
tof_bValid_PV : TOF;
tTimeout : TIME := T#2S;
fbLogger: FB_LogMessage := (eSubsystem:=E_SubSystem.VACUUM);
rt_bValid: R_TRIG;
ft_bValid: F_TRIG;
END_VAR
fbLogHandler();
PRG_PMPS ();
//Writes watchdog bit to remote vac_lfe_gem reading the ion pumps around the gass attenuator
fb_ADS_WATCHDOG_VAC_LFE_GEM(
sNetId:= '172.21.88.32.1.1',
nPort:= 851,
sVarName:= 'MAIN.iWatchdog',
bError=> );
// Run the Diagnostics PRG
DIAGNOSTICS();
(*HXR Accelerator side PLC Interface*)
//Update Accelerator Gauge Pressure Reading
//Accelerator_Upstream_Gauge.xPRESS_OK := i_xUpstreamTreaty_PressOK;
IF(i_xUpstreamTreaty_PressOK) THEN
Accelerator_Upstream_Gauge.xPRESS_OK := TRUE;
//Accelerator_Upstream_Gauge.eState := gc_GaugeValidState;
Accelerator_Upstream_Gauge.rPRESS := 5e-6; //torr
ELSE
Accelerator_Upstream_Gauge.xPRESS_OK := FALSE;
//Accelerator_Upstream_Gauge.eState := 1;
Accelerator_Upstream_Gauge.rPRESS := 760; //torr
END_IF
(*HXR Gas Attenuator PLC Interface*)
(*TXI PLC Interface*)
PC2L1_L2SI_PIP_01();
(*XRT PLC Interface*)
XRT_PressureLinkHelper();
XRT_Downstream_Gauge.rPRESS := LREAL_TO_REAL(XRT_PressureLinkHelper.fValue);
//Add a 2 second buffer if the PV's Severity is not 0. This protects the PV from network blips
tof_bValid_PV(IN:=XRT_PressureLinkHelper.bValid, PT:=tTimeout);
XRT_Downstream_Gauge.xPRESS_OK := tof_bValid_PV.Q AND XRT_Downstream_Gauge.rPRESS >0 ;
rt_bValid(CLK:=XRT_PressureLinkHelper.bValid);
ft_bValid(CLK:=XRT_PressureLinkHelper.bValid);
IF(rt_bValid.Q)THEN
fbLogger(sMsg:=concat('EPICS Signal is Valid. Severity: ', INT_TO_STRING(XRT_PressureLinkHelper.iLastValidSeverity)), eSevr:=TcEventSeverity.Info);
END_IF
IF(ft_bValid.Q)THEN
fbLogger(sMsg:=concat('EPICS Signal Disconnected. Severity: ', INT_TO_STRING(XRT_PressureLinkHelper.iLastValidSeverity)), eSevr:=TcEventSeverity.Critical);
END_IF
//Modbus
XRT_Modbus_Gauge(IP:='172.21.88.67',nMBAddr:=8#4000,iBitOffset:=8);
//Combine two readings in one gauge
XRT_DS_Gauge.xPRESS_OK := XRT_Downstream_Gauge.xPRESS_OK OR XRT_Modbus_Gauge.VG.xPRESS_OK;
XRT_DS_Gauge.rPRESS := XRT_Downstream_Gauge.rPRESS;
XRT_DS_Gauge.sPath := 'XRT UM6 GCC 01';
(*PIRANI Gauges*)
TV1L0_GPI_01(b937A:=TRUE, PG=>);
TV2L0_GPI_01(b937A:=TRUE, PG=>);
TV2L0_GPI_02(b937A:=TRUE, PG=>);
SL1L0_POWER_GPI_01(b937A:=TRUE, PG=>);
AT2L0_SOLID_GPI_01(b937A:=TRUE, PG=>);
SP1L0_DCCM_GPI_01(b937A:=TRUE, PG=>);
PA1L0_GPI_01(b937A:=TRUE, PG=>);
MR1L0_HOMS_GPI_01(b937A:=TRUE, PG=>);
MR1L1_TXI_GPI_01(PG=>);
BT2L0_PLEG_GPI_01(PG=>);
MR2L0_HOMS_GPI_01(PG=>);
ST1L0_XTES_GPI_01(PG=>);
//H1.1 and H1.2
TV4L0_GPI_01(PG=>);
TV4L0_GPI_02(PG=>);
TV5L0_GPI_01(PG=>);
TV5L0_GPI_02(PG=>);
(*Cold Cathode Gauges*)
TV1L0_GCC_01(PG:=TV1L0_GPI_01.PG,IG=>, b937A:=TRUE);
TV2L0_GCC_01(PG:=TV2L0_GPI_01.PG, IG=>, b937A:=TRUE);
TV2L0_GFS_01(PG:=TV2L0_GPI_02.PG,IG=>, b937A:=TRUE);
TV2L0_GCC_02(PG:=TV2L0_GPI_02.PG,IG=>, b937A:=TRUE);
SL1L0_POWER_GCC_01(PG:=SL1L0_POWER_GPI_01.PG,IG=>, b937A:=TRUE);
AT2L0_SOLID_GCC_01(PG:=AT2L0_SOLID_GPI_01.PG,IG=>, b937A:=TRUE);
SP1L0_DCCM_GCC_01(PG:=PA1L0_GPI_01.PG,IG=>, b937A:=TRUE);
PA1L0_GCC_01(PG:=PA1L0_GPI_01.PG,IG=>, b937A:=TRUE);
MR1L0_HOMS_GCC_01(PG:=MR1L0_HOMS_GPI_01.PG,IG=>, b937A:=TRUE);
MR1L1_TXI_GCC_01(PG:=MR1L1_TXI_GPI_01.PG,IG=>,bEP:=TRUE);
BT2L0_PLEG_GCC_01(PG:=BT2L0_PLEG_GPI_01.PG,IG=>,bEP:=TRUE);
MR2L0_HOMS_GCC_01(PG:=MR2L0_HOMS_GPI_01.PG,IG=>,bEP:=TRUE);
ST1L0_XTES_GCC_01(PG:=ST1L0_XTES_GPI_01.PG,IG=>,bEP:=TRUE);
//H1.1 and H1.2
TV4L0_GCC_01(PG:=TV4L0_GPI_01.PG,IG=>,bEP:=TRUE);
TV4L0_GCC_02(PG:=TV4L0_GPI_02.PG,IG=>,bEP:=TRUE);
TV5L0_GCC_01(PG:=TV5L0_GPI_01.PG,IG=>,bEP:=TRUE);
TV5L0_GCC_02(PG:=TV5L0_GPI_02.PG,IG=>,bEP:=TRUE);
TV5L0_GFS_01(PG:=TV5L0_GPI_02.PG,IG=>);
TV5L0_GCC_03(PG:=TV5L0_GPI_02.PG,IG=>,bEP:=TRUE);
(*Ion Pumps*)
RTDSL0_PIP_01(i_stGauge:=TV1L0_GPI_01.PG, i_xOverrideMode:=xSystemOverrideMode_EBD, stPump=>);
RTDSL0_PIP_02(i_stGauge:=TV1L0_GPI_01.PG, i_xOverrideMode:=xSystemOverrideMode_EBD, stPump=>);
RTDSL0_PIP_03(i_stGauge:=TV1L0_GPI_01.PG, i_xOverrideMode:=xSystemOverrideMode_EBD, stPump=>);
RTDSL0_PIP_04(i_stGauge:=TV1L0_GPI_01.PG, i_xOverrideMode:=xSystemOverrideMode_EBD, stPump=>);
RTDSL0_PIP_05(i_stGauge:=TV1L0_GPI_01.PG, i_xOverrideMode:=xSystemOverrideMode_EBD, stPump=>);
IM1L0_XTES_PIP_01(i_stGauge:=TV2L0_GPI_01.PG, i_xOverrideMode:=xSystemOverrideMode_EBD, stPump=>);
TV2L0_PIP_01(i_stGauge:=TV2L0_GPI_01.PG, i_xOverrideMode:=xSystemOverrideMode_EBD, stPump=>);
TV2L0_PIP_02(i_stGauge:=TV2L0_GPI_02.PG, i_xOverrideMode:=xSystemOverrideMode_EBD, stPump=>);
TV2L0_PIP_03(i_stGauge:=TV2L0_GPI_02.PG, i_xOverrideMode:=xSystemOverrideMode_EBD, stPump=>);
SL1L0_POWER_PIN_01(i_stGauge:=SL1L0_POWER_GPI_01.PG, i_xOverrideMode:=xSystemOverrideMode_FEE, stPump=>);
AT2L0_SOLID_PIN_01(i_stGauge:=AT2L0_SOLID_GPI_01.PG, i_xOverrideMode:=xSystemOverrideMode_FEE, stPump=>);
SP1L0_DCCM_PIP_01(i_stGauge:=SP1L0_DCCM_GPI_01.PG, i_xOverrideMode:=xSystemOverrideMode_FEE, stPump=>);
PA1L0_PIN_01(i_stGauge:=PA1L0_GPI_01.PG, i_xOverrideMode:=xSystemOverrideMode_FEE, stPump=>); //was the Kmono GPI, now its bad
MR1L0_HOMS_PIP_01(i_stGauge:=MR1L0_HOMS_GPI_01.PG, i_xOverrideMode:=xSystemOverrideMode_FEE, stPump=>);
MR1L1_TXI_PIP_01(i_stGauge:=MR1L1_TXI_GPI_01.PG, i_xOverrideMode:=xSystemOverrideMode_FEE, stPump=>);
BT2L0_PLEG_PIP_01(i_stGauge:=BT2L0_PLEG_GPI_01.PG, i_xOverrideMode:=xSystemOverrideMode_FEE, stPump=>);
MR2L0_HOMS_PIP_01(i_stGauge:=MR2L0_HOMS_GPI_01.PG, i_xOverrideMode:=xSystemOverrideMode_FEE, stPump=>);
TV3L0_PIP_01(i_stGauge:=ST1L0_XTES_GPI_01.PG, i_xOverrideMode:=xSystemOverrideMode_FEE, stPump=>);
ST1L0_XTES_PIP_01(i_stGauge:=ST1L0_XTES_GPI_01.PG, i_xOverrideMode:=xSystemOverrideMode_FEE, stPump=>);
//H1.1 and H1.2
TV4L0_PIP_01(i_stGauge:=TV4L0_GPI_01.PG, i_xOverrideMode:=xSystemOverrideMode_H1_1_H1_2, stPump=>);
TV4L0_PIP_02(i_stGauge:=TV4L0_GPI_01.PG, i_xOverrideMode:=xSystemOverrideMode_H1_1_H1_2, stPump=>);
PA2L0_PIN_01(i_stGauge:=TV5L0_GPI_01.PG, i_xOverrideMode:=xSystemOverrideMode_H1_1_H1_2, stPump=>);
TV5L0_PIP_01(i_stGauge:=TV5L0_GPI_01.PG, i_xOverrideMode:=xSystemOverrideMode_H1_1_H1_2, stPump=>);
TV5L0_PIP_02(i_stGauge:=TV5L0_GPI_02.PG, i_xOverrideMode:=xSystemOverrideMode_H1_1_H1_2, stPump=>);
TV5L0_PIP_03(i_stGauge:=TV5L0_GPI_02.PG, i_xOverrideMode:=xSystemOverrideMode_H1_1_H1_2, stPump=>);
(*Vacuum Gate Valve*)
TV1L0_VGC_01(
i_stUSG:= Accelerator_Upstream_Gauge,
i_stDSG:= RTDSL0_PIP_03.q_IG,
i_xDis_DPIlk:= FALSE,
i_xEPS_OK:= TRUE,
i_xPMPS_OK:= TRUE,
i_xExt_OK:= TRUE,
i_xOverrideMode:= xSystemOverrideMode_EBD,
i_xReset:= xReset_PMPS_FFO1,
i_sDevName:= 'TV1L0:VGC:01',
iq_stValve=> ,
xMPS_OK=> ,
io_fbFFHWO:= g_FastFaultOutput1,
fbArbiter:= g_fbArbiter1 );
IM1L0_XTES_VGC_01(
i_stUSG:= RTDSL0_PIP_03.q_IG,
i_stDSG:= IM1L0_XTES_PIP_01.q_IG,
i_xDis_DPIlk:= FALSE ,
i_xEPS_OK:= TRUE,
i_xPMPS_OK:= TRUE,
i_xExt_OK:= TRUE,
i_xOverrideMode:= xSystemOverrideMode_EBD,
i_xReset:= xReset_PMPS_FFO1,
i_sDevName:= 'IM1L0:XTES:VGC:01',
iq_stValve=> ,
xMPS_OK=> ,
io_fbFFHWO:= g_FastFaultOutput1,
fbArbiter:= g_fbArbiter1 );
TV2L0_VGC_01(
i_stUSG:= TV2L0_PIP_01.q_IG,
i_stDSG:= TV2L0_PIP_02.q_IG,
i_xDis_DPIlk:= FALSE ,
i_xEPS_OK:= TRUE,
i_xPMPS_OK:= TRUE,
i_xExt_OK:= TRUE,
i_xOverrideMode:= xSystemOverrideMode_EBD,
i_xReset:= xReset_PMPS_FFO1,
i_sDevName:= 'TV2L0:VGC:01',
iq_stValve=> ,
xMPS_OK=> ,
io_fbFFHWO:= g_FastFaultOutput1,
fbArbiter:= g_fbArbiter1 );
TV2L0_VGC_02(
i_stUSG:= TV2L0_PIP_03.q_IG,
i_stDSG:= SL1L0_POWER_GCC_01.IG,
i_xDis_DPIlk:= FALSE ,
i_xEPS_OK:= TRUE,
i_xPMPS_OK:= TRUE,
i_xExt_OK:= TRUE,
i_xOverrideMode:= xSystemOverrideMode_FEE,
i_xReset:= xReset_PMPS_FFO1,
i_sDevName:= 'TV2L0:VGC:02',
iq_stValve=> ,
xMPS_OK=> ,
io_fbFFHWO:= g_FastFaultOutput1,
fbArbiter:= g_fbArbiter1 );
PC1L0_XTES_VGC_01(
i_stUSG:= AT2L0_SOLID_PIN_01.q_IG,
i_stDSG:= SP1L0_DCCM_PIP_01.q_IG,
i_xDis_DPIlk:= FALSE ,
i_xEPS_OK:= TRUE,
i_xPMPS_OK:= TRUE,
i_xExt_OK:= TRUE,
i_xOverrideMode:= xSystemOverrideMode_FEE,
i_xReset:= xReset_PMPS_FFO1,
i_sDevName:= 'PC1L0:XTES:VGC:01',
iq_stValve=> ,
xMPS_OK=> ,
io_fbFFHWO:= g_FastFaultOutput1,
fbArbiter:= g_fbArbiter1 );
// PA1L0_VFS_01 : FB_VFS;
MR1L0_HOMS_VGC_01(
i_stUSG:= PA1L0_PIN_01.q_IG,
i_stDSG:= MR1L0_HOMS_PIP_01.q_IG,
i_xDis_DPIlk:= FALSE ,
i_xEPS_OK:= TRUE,
i_xPMPS_OK:= TRUE,
i_xExt_OK:= TRUE,
i_xOverrideMode:= xSystemOverrideMode_FEE,
i_xReset:= xReset_PMPS_FFO1,
i_sDevName:= 'MR1L0:HOMS:VGC:01',
iq_stValve=> ,
xMPS_OK=> ,
io_fbFFHWO:= g_FastFaultOutput1,
fbArbiter:= g_fbArbiter1 );
BT2L0_PLEG_VGC_01(
i_stUSG:= MR1L0_HOMS_PIP_01.q_IG,
i_stDSG:= BT2L0_PLEG_PIP_01.q_IG,
i_xDis_DPIlk:= FALSE ,
i_xEPS_OK:= TRUE,
i_xPMPS_OK:= TRUE,
i_xExt_OK:= TRUE,
i_xOverrideMode:= xSystemOverrideMode_FEE,
i_xReset:= xReset_PMPS_FFO1,
i_sDevName:= 'BT2L0:PLEG:VGC:01',
iq_stValve=> ,
xMPS_OK=> ,
io_fbFFHWO:= g_FastFaultOutput4, // TODO(josh): ask maggie if this is sufficient because we have connected the FF
fbArbiter:= g_fbArbiter1 );
MR2L0_HOMS_VGC_01(
i_stUSG:= BT2L0_PLEG_PIP_01.q_IG,
i_stDSG:= MR2L0_HOMS_PIP_01.q_IG,
i_xDis_DPIlk:= FALSE ,
i_xEPS_OK:= TRUE,
i_xPMPS_OK:= TRUE,
i_xExt_OK:= TRUE,
i_xOverrideMode:= xSystemOverrideMode_FEE,
i_xReset:= xReset_PMPS_FFO1,
i_sDevName:= 'MR2L0:HOMS:VGC:01',
iq_stValve=> ,
xMPS_OK=> ,
io_fbFFHWO:= g_FastFaultOutput1,
fbArbiter:= g_fbArbiter1 );
MR2L0_HOMS_VGC_02(
i_stUSG:= MR2L0_HOMS_PIP_01.q_IG,
i_stDSG:= ST1L0_XTES_PIP_01.q_IG,
i_xDis_DPIlk:= FALSE ,
i_xEPS_OK:= TRUE,
i_xPMPS_OK:= TRUE,
i_xExt_OK:= TV3L0_VFS_01_Interface.i_xVAC_FAULT_OK,
i_xOverrideMode:= xSystemOverrideMode_FEE,
i_xReset:= xReset_PMPS_FFO1,
i_sDevName:= 'MR2L0:HOMS:VGC:02',
iq_stValve=> ,
xMPS_OK=> ,
io_fbFFHWO:= g_FastFaultOutput1,
fbArbiter:= g_fbArbiter1 );
TV1L1_VGC_01(
i_stUSG:= MR1L1_TXI_PIP_01.q_IG,
i_stDSG:= MR2L0_HOMS_PIP_01.q_IG,
i_xDis_DPIlk:= FALSE ,
i_xEPS_OK:= TRUE,
i_xPMPS_OK:= TRUE,
i_xExt_OK:= TRUE,
i_xOverrideMode:= xSystemOverrideMode_FEE,
i_xReset:= xReset_PMPS_FFO1,
i_sDevName:= 'TV1L1:VGC:01',
iq_stValve=> ,
xMPS_OK=> ,
io_fbFFHWO:= g_FastFaultOutput4,
fbArbiter := g_fbArbiter1 );
// PC2L1_L2SI_VGC_01 : FB_VGC;
PC2L1_L2SI_VGC_01(
i_stUSG:= MR2L0_HOMS_PIP_01.q_IG,
i_stDSG:= PC2L1_L2SI_PIP_01.VG,
i_xDis_DPIlk:= FALSE ,
i_xEPS_OK:= TRUE,
i_xPMPS_OK:= TRUE,
i_xExt_OK:= TRUE,
i_xOverrideMode:= xSystemOverrideMode_FEE,
i_xReset:= xReset_PMPS_FFO1,
i_sDevName:= 'PC2L1:L2SI:VGC:01',
iq_stValve=> ,
xMPS_OK=> ,
io_fbFFHWO:= g_FastFaultOutput1,
fbArbiter := g_fbArbiter1 );
//H1.1
TV4L0_VGC_01(
i_stUSG:= TV4L0_PIP_01.q_IG,
i_stDSG:= TV4L0_PIP_02.q_IG,
i_xDis_DPIlk:= FALSE ,
i_xEPS_OK:= TRUE,
i_xPMPS_OK:= TRUE,
i_xExt_OK:= TV3L0_VFS_01_Interface.i_xVAC_FAULT_OK,
i_xOverrideMode:= xSystemOverrideMode_H1_1_H1_2,
i_xReset:= xReset_PMPS_FFO2,
i_sDevName:= 'TV4L0:VGC:01',
iq_stValve=> ,
xMPS_OK=> ,
io_fbFFHWO:= g_FastFaultOutput2,
fbArbiter:= g_fbArbiter1 );
TV5L0_VGC_01(
i_stUSG:= TV5L0_PIP_01.q_IG,
i_stDSG:= TV5L0_PIP_02.q_IG,
i_xDis_DPIlk:= FALSE ,
i_xEPS_OK:= TRUE,
i_xPMPS_OK:= TRUE,
i_xExt_OK:= TRUE,
i_xOverrideMode:= xSystemOverrideMode_H1_1_H1_2,
i_xReset:= xReset_PMPS_FFO2,
i_sDevName:= 'TV5L0:VGC:01',
iq_stValve=> ,
xMPS_OK=> ,
io_fbFFHWO:= g_FastFaultOutput2,
fbArbiter:= g_fbArbiter1 );
TV6L0_VGC_01(
i_stUSG:= TV5L0_PIP_03.q_IG,
i_stDSG:= SP1L2_LODCM_GCC_01.IG,
i_xDis_DPIlk:= FALSE ,
i_xEPS_OK:= TRUE,
i_xPMPS_OK:= TRUE,
i_xExt_OK:= TRUE,
i_xOverrideMode:= xSystemOverrideMode_H1_1_H1_2,
i_xReset:= xReset_PMPS_FFO2,
i_sDevName:= 'TV6L0:VGC:01',
iq_stValve=> ,
xMPS_OK=> ,
io_fbFFHWO:= g_FastFaultOutput2,
fbArbiter:= g_fbArbiter1 );
(*Vacuum Fast Shutter Valve*)
TV3L0_VFS_01_Interface(
IG:=TV5L0_GFS_01.IG);
ctuTest(CU:=GVL_LFE_VAC_PMPS.g_FastFaultOutput1.q_xFastFaultOut, PV:=100);
//LCLS-II-HE Intermin install
//Hutch 1.3
// To be removed when HE installation is complete
(*SP1L2-LODCM*)
SP1L2_LODCM_GPI_01();
SP1L2_LODCM_GCC_01(PG:=SP1L2_LODCM_GPI_01.PG);
TV8L0_GPI_01();
TV8L0_GCC_01(PG:= TV8L0_GPI_01.PG);
TV7L0_PIP_01(i_stGauge:= SP1L2_LODCM_GCC_01.IG);
TV8L0_PIP_01(i_stGauge:= TV8L0_GCC_01.IG);
TV8L0_VGC_01(
i_stUSG:= TV8L0_PIP_01.q_IG,
i_stDSG:= XRT_DS_Gauge,
i_xDis_DPIlk:= FALSE ,
i_xEPS_OK:= TRUE,
i_xPMPS_OK:= TRUE,
i_xExt_OK:= TRUE,
i_xOverrideMode:= xSystemOverrideMode_H1_1_H1_2,
i_xReset:= xReset_PMPS_FFO2,
i_sDevName:= 'TV8L0:VGC:01',
iq_stValve=> ,
xMPS_OK=> ,
io_fbFFHWO:= g_FastFaultOutput2,
fbArbiter:= g_fbArbiter1 );
END_PROGRAM
- Related:
PRG_FastShutter
PROGRAM PRG_FastShutter
VAR
END_VAR
(*
PA1L0_VFS_01(
i_xPMPS_OK:= TRUE,
i_xExt_OK:= TRUE,
i_sDevName:= 'PA1L0:VFS:01',
io_fbFFHWO:= g_FastFaultOutput3);
*)
TV3L0_VFS_01(
i_xPMPS_OK:= TRUE,
i_xExt_OK:= TRUE,
i_sDevName:= 'TV3L0:VFS:01',
io_fbFFHWO:= g_FastFaultOutput3);
(*FastFaultOuput*)
g_FastFaultOutput3.Execute(bAutoReset:= TRUE);
END_PROGRAM
PRG_PMPS
PROGRAM PRG_PMPS
VAR
fbArbiterIO : FB_SubSysToArbiter_IO;
fb_vetoArbiter: FB_VetoArbiter;
ff4_ff1_link_vac: FB_FastFault := (i_xAutoReset := TRUE, i_DevName := 'FF4 to FF1 Link', i_Desc := 'This is virtual FF4 fault, Please check the Group 4 faulting device ', i_TypeCode := 16#9999);
END_VAR
fbArbiterIO(Arbiter := g_fbArbiter1, fbFFHWO := g_FastFaultOutput1);
g_fbArbiter1.AddRequest(nReqID := 95 , stReqBp := PMPS_GVL.cstFullBeam, sDevName := 'plc-lfe-vac');
(*FastFaultOuput*)
g_FastFaultOutput1.Execute(bAutoReset:= TRUE);
g_FastFaultOutput2.Execute(i_xVeto:=PMPS_GVL.stCurrentBeamParameters.aVetoDevices[PMPS.L_Stopper.ST1L0], bAutoReset:= TRUE);
g_FastFaultOutput4.Execute(i_xVeto:=PMPS_GVL.stCurrentBeamParameters.aVetoDevices[PMPS.L_Stopper.MR1L1_OUT] AND PMPS_GVL.stCurrentBeamParameters.aVetoDevices[PMPS.L_Stopper.MR1L0_L0], bAutoReset:= TRUE);
ff4_ff1_link_vac(
io_fbFFHWO := g_FastFaultOutput1,
i_xOK := g_FastFaultOutput4.q_xFastFaultOut);
//fb_vetoArbiter( HigherAuthority := g_fbArbiter1, FFO := g_FastFaultOutput1); // This should be the FFO upstream of the veto device
fbArbiterIO(Arbiter := g_fbArbiter1, fbFFHWO := g_FastFaultOutput1);
END_PROGRAM